(China (Mainland))
Product Summary
The 256Mb SDRAM is a high speed CMOS, dynamic
random-access memory designed to operate in 3.3V Vd d
and 3.3V Vd d q memory systems containing 268,435,456
bits. Internally confgured as a quad-bank DRAM with a
synchronous interface. Each 67,108,864-bit bank is orga-
nized as 4,096 rows by 512 columns by 32 bits.
The 256Mb SDRAM includes an AUTO REFRESH MODE,
and a power-saving, power-down mode. All signals are
registered on the positive edge of the clock signal, CLK.
All inputs and outputs are LVTTL compatible.
The 256Mb SDRAM has the ability to synchronously burst
data at a high data rate with automatic column-address
generation, the ability to interleave between internal banks
to hide precharge time and the capability to randomly
change column addresses on each clock cycle during
burst access.
Features
? Clock frequency: 166, 143 MHz
? Fully synchronous; all signals referenced to a
positive clock edge
? Internal bank for hiding row access/precharge
? Single Power supply: 3.3V + 0.3V
? LVTTL interface
? Programmable burst length
– (1, 2, 4, 8, full page)
? Programmable burst sequence:
Sequential/Interleave
? Auto Refresh (CBR)
? Self Refresh
? 4096 refresh cycles every 16ms (A2 grade) or
64 ms (Commercial, Industrial, A1 grade)
? Random column address every clock cycle
? Programmable CAS latency (2, 3 clocks)
? Burst read/write and burst read/single write
operations capability
? Burst termination by burst stop and precharge
command
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
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 IS42S32800D-6TL-TR |
ISSI |
DRAM 128M (4Mx32) 166MHz SDRAM, 3.3v |
Data Sheet |
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IS42S32800D-6TLI-TR |
ISSI |
DRAM 256M (8Mx32) 166MHz SDRAM, 3.3v |
Data Sheet |
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IS42S32800D-6TLI |
ISSI |
DRAM 256M (8Mx32) 166MHz SDRAM, 3.3v |
Data Sheet |
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IS42S32800D-6TL |
ISSI |
DRAM 256M (8Mx32) 166MHz SDRAM, 3.3v |
Data Sheet |
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